Mr. Shreejesh Nair

Mr. Sreejesh SG is a Senior Technical Officer at NIELIT Calicut with over 20 years of R&D experience, focusing primarily on VLSI, FPGA, ASIC, and IPCore Design, as well as technical training. He holds a B.Tech in ECE and an M.Tech in VLSI from the Vellore Institute of Technology, where he specialized in Ultrasound Imaging, FPGA, and DSP. Before his current 18-year tenure at NIELIT Calicut, he expanded his expertise through roles as an Electronics Engineer at INEL Electronics in India and as a Research Trainee at NTT Basic Research Laboratories in Japan. As a key contributor to institutional infrastructure, he has co-established multiple advanced facilities at NIELIT Calicut, including the Advanced VLSI System Design Lab, a funded R&D Lab for Medical Ultrasound research, the Chip to System Design Lab, the Swadeshi Microprocessor-based Remote Embedded System Design Lab, and the Skilled Manpower Advance Research and Training (SMART) Facility.